[会议信息]2014RFIT研讨会系列之---大牛Prof. Abidi、Prof. Thomas H.Lee高级射频集成电路设计课程

8月26-27日在上海，8月30日在合肥，我们邀请了射频集成电路设计领域专家Prof. Thomas H.Lee, Prof. C. Patrick Yue，以及美国工程院院士、RF CMOS领域权威Prof. Asad A. Abidi为我们带来Advanced RFIC Design的课程， s~c cx"HH  
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本课程属于射频集成电路设计高级课程，适合具有一定基础的学员：射频电路、无线通讯等设计人员、模拟/数模混合电路设计人员、器件建模等相关领域的研究人员和管理人员、集成电路专业研究生以及对射频集成电路感兴趣的人。 A[^k
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课程内容： & sXMB  
本课程属于高级射频集成电路设计培训课程，适合具有一定基础的学员：偏重设计中的实际问题，RFIC权威教授：Prof. Thomas H. Lee和Prof. C. Patrick Yue在上海、Prof. Asad A. Abidi在合肥为我们带来以下课程内容： ]}.|b6\  
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CMOS RF IC Design 'L^M"f^I  
（Prof. Thomas H. Lee, August 26, 2014,Shanghai） ?Iag-g9#=m  
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1、Impedance transformation 4Vd[cRh2  
▲When to do it; When not to do it; how to do it PK&X
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▲Bode-Fano limits on matching bandwidth XG5"u  
▲Unintended transformation by active circuits: "Strange impedance behaviors (SIBs); simple models and examples   om6`>I*  
▲Conscious exploitation of SIBs KXBTJ&  
2、Noise in linear, time-invariant (LTI) systems .s|5AC[  
▲LNA design: Noise match vs. power match (aB:P03  
▲How to use SIBs to achieve good noise and power match simultaneously >xXq:4l>}  
▲Noise "cancellation" {yMkd4v  
3、Noise in linear, time-varying (LTV) systems V8Z@y&ny  
▲Phase noise in oscillators: Theory and practice \7e4t  
▲Noise in mixers GY"c1KE$  
4、Nonlinearity `6PBV+]Vm3  
▲Figures of merit: 1-dB compression point; intermodulation intercepts (IP2, IP3); adjacent-channel power ratio (ACPR); spurious-free dynamic range (SFDR) (Sj<>xgd  
▲Nonlinearity reduction techniques: Feedback; strong and weak feedforward Z5`V\$  
5、Techniques for circuit design at extremes of frequency x6vkd%fCj  
▲Amplifier bandwidth extension techniques: Shunt peaking; bridged T-coil; distributed architectures; Ft-doubler Wxi;Tq9C@_  
▲Oscillator and synthesizer frequency extension techniques: Multiphase push-push-push; frequency multiplication with nonlinear elements; injection locking (if time permits) Yfy";C7X  
▲Power combining structures and strategies: Corporate combiners; free-space combining 5H( ]"C  
▲Interconnect: Microstrip, stripline, coplanar waveguide ~h%H;wC&  
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Practical RFIC Implementation Techniques in Scaled CMOS Technologies 0QEcJ]Qb8  
（Prof. C. Patrick Yue, August 27, 2014,Shanghai） @[Wf!8_  
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1、CMOS for RFIC Products xX8c>p  
▲Trends in wireless communication and RFIC integration d-gcXaA-8  
▲RF technology options: to use or not to use? BLm}mb#/{  
▲Scalability of RF CMOS beyond 130nm: device characteristics and passive component quality at RF 7}(YCZny5  
2、RF Device and Passive Component Modeling xJOp~fKG  
▲MOSFET macro modeling and layout optimization SzG?m]  
▲Physical modeling and layout optimization for inductors ?gjkgCbC#  
▲Transformer design trade-offs and circuit applications sBNqg~HwB?  
▲Varactor modeling and optimization – diode vs. MOS q}(f9  
▲Test structure design and characterization techniques z*o2jz?t4  
3、 Technology Key Circuit Blocks I,r0K]  
▲T/R switch – improve P-1dB and isolation with tuned circuits \JP9lJ3<  
▲LNA – topology, sizing and biasing for noise and power V-"#Kf9  
▲Mixer – topology, linearity and noise considerations T`c:16I  
▲VCO – phase noise, power and tuning range optimization bKh}Y`  
4、 Modeling, Substrate Noise and ESD Techniques \t? ;p-+ta  
▲Methodology for predictable design using RF sub-circuits C\ 34R  
▲Supply and substrate noise coupling   s,M]f,T  
▲RF ESD protection strategy from a system perspective Iomx"y]9  
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Systematic Design of Oscillator Circuits {RD9j1  
（Prof. Asad A. Abidi, August 30, 2014,Hefei） cq/@ng*o  
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In this one day tutorial/short course, Prof. Asad A. Abidi will present his unique highly valued training methods and contents of oscillator design based on fundamental analysis and calculation, not the common PDK-based and EDA-based “error-and-try” optimization. It will most benefit circuit designers in industry involved with oscillators and frequency synthesizers.   DP!8c  
▲Noise processes in CMOS oscillators; %-|$7?~  
▲Time-domain jitter calculation;   dd4^4X`j  
▲Effects of white noise and flicker noise etc.; &n .. CU/Id`"tW  
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