[互助]ADS生成版图的问题

Generation of layout started from schematic representation: rQD7ZN_ R  
+G<9|-  
     1  design(s) processed p+d?k"WN?  
     21  item(s) regenerated in layout ,[0rh%%j  
     4  item(s) relocated in layout b>"=kN/  
     0  item(s) unplaced in layout XKT2u!Lx  
     0  trace design(s) created   *[[TDduh&  
(xhV>hsA  
Errors and Warnings (4 total): k->cqtG  
60&4?<lR4  
In design S_PARA, instance C3 has been offset by (0, -100) because otherwise 9a0ibN6m  
components would have overlapped at (-0.7, 4.33). dk4|*
l-  
.|9o`mF7  
In design S_PARA, instance P3 has been offset by (0, -200) because otherwise
] cY  
components would have overlapped at (-0.7, 4.33).
CNF3".a  
7ZRLSq'S  
In design S_PARA, instance C5 has been offset by (0, -300) because otherwise pUXszPf  
components would have overlapped at (-0.7, 4.33). _f5n t:-  
-R-|[xN  
In design S_PARA, instance C6 has been offset by (0, -400) because othe .. ~g[<A?0=y  
p6e9mSs  

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看那上面的意思好像是说元器件重起来了。我没碰到过所以我也不清楚，上面的只是我猜的。

就是说在生成版图时这几个重叠在一起。这个对版图是没有问题的，你拖开就可以了