[数值]【IEEE Paper】High-speed PCB的SI、PI、EMI   ——电磁数值计算及仿真

自己做相关课题一年多，期间收集的IEEE文献，有不少是IEEE TRANSACTIONS。 T6R7,Vt'v  
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【IEEE Paper】High-speed PCB的SI、PI、EMI   ——电磁数值计算及仿真，很有参考价值。 J
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1、A New Method for the Reduction of Crosstalk and Echo in Multiconductor Interconnections. }RA3$%3  
2、A Novel Efficient Approach of Include Frequency-Dependent Power Delivery Effects in Bus Signal Integrity Simulation. _H4$$  
3、A Sensitivity - Analysis on Design Parameters and Tolerances of Signal Integrity of High Speed Data Transfer Connectors. PTzp;.  
4、A Signal Integrity Test Bed for PCB Buses. 8K@"B  
5、A Signal Integrity-driven Buffer Insertion Technique for Post-Routing Noise and Delay Optimization. 6bbZ<E5At  
6、A Study of High Speed implementation for System on Chip on 2 layers Printed Circuit Board. ,5eH2W  
7、A Statistically-Enhanced Analytical Method for PCB Traces Impedance Extraction. `R=a@DQ  
8、Accurate crosstalk noise modeling for early signal integrity analysis. 23}BW_m  
9、Addressing Signal Integrity in Networks on Chip Interconnects through Crosstalk-Aware Double Error Correction Coding. 28T\@zi  
10、An Effective Test Pattern Generation for Testing Signal Integrity. 2vqmsl?  
11、An integrated signal and power integrity analysis for signal traces through the parallel planes using hybrid finite-element and finitedifference time-domain techniques.Analysis for Signal and Power Integrity Using the Multilayered Finite Difference Method. u=@h`5-fp  
12、Analysis of Power Supply Noise in the Presence of Process Variations. oh7#cFZZ0  
13、Are On-Chip Power-Ground Planes Really Needed A Signal Integrity Perspective. ]cF1c90%  
14、Behavioral Modeling for Timing, Noise, and Signal Integrity Analysis. lFp!XZ!  
15、Built-In Self-Test for Signal Integrity. +A8=R%&b)[  
16、Circuit Model for Mode Conversion in Grounded Differential Signal Paths. ).0V%}>  
17、Comparative Study of Microstrip and Stripline in the Split Reference Plane of High Speed Digital Circuit Application. CB*`  
18、Comparisons Between Serpentine and Flat Spiral Delay Lines on Transient Reflection Transmission Waveforms and Eye Diagrams. E8T"{ R80  
19、Coupling Between Differential Signals and the DC Power-Bus in Multilayer PCBs. `a9k!3_L  
20、Cross-SSN analysis in multilayer printed circuit boards. [cGt  
21、Cross-talk Interference Aggressor Signal Frequency Estimation in Printed Circuit Boards by means of Wavelet Signal Singularity Identification. gdoJ4b  
21、Decoupling Capacitors for Multi-Voltage Power Distribution Systems. , @%C8Z  
22、Crosstalk Modeling for Coupled RLC Interconnects With Application to Shield Insertion. vp\PYg;x  
23、Full-chip Multilevel Routing for Power and Signal Integrity. &YT_#M  
24、Effect of Decoupling Capacitor on Signal Integrity in Applications with Reference Plane Change. ?ID* /u|X  
25、Effectiveness of PCB Simulation in Teaching High-Speed Digital Design. v87$NQvwQ  
26、Efficient Full-Wave Simulation of HighSpeed Printed Circuit Boards and Electronic Packages. Qq'i*Mh  
27、Efficient Signal Integrity Verification of Multi-Coupled Transmission Lines with Asynchronously Switching Non-Linear Drivers. qDby!^ryc  
28、ESTIMATION OF STRIP-LINE LOSSES IN PRINTED CIRCUIT BOARDS. a. h?4+^bN  
29、Electromagnetic signatures A virtual test and verification tool for SoC signal integrity. xa87xX=a  
30、Extraction of a SPICE Via Model from Full-Wave Modeling for Differential Signaling. o &BPG@n  
31、Generalized Traveling-Wave-Based Waveform Approximation Technique for the Efficient Signal Integrity Verification of Multicoupled OW+e_im}  
Transmission Line System. v}7@CP]nV  
32、High-MDSI A High-level Signal Integrity Fault Test Pattern Generation Method for Interconnects. X'V+^u@W  
33、Improving Signal Integrity by Optimal Design of PowerGround Plane Stack-up Structure. Bii6Z@kS  
34、Improving Signal Integrity in Circuit Boards by Incorporating Embedded Edge Terminations. D^66p8t  
35、Influence of the Ground Line Position on the Signal Integrity of Product-Related Interconnects in the Frequency and Time Domain. +M44XhT  
36、Issues in validation of complex-valued simulations for signal integrity analysis. KI Ek/]<H  
37、Modeling and Simulation of a Large Integrated Circuit Package. //\ds71h  
38、Modeling Noise Coupling Between Package and PCB PowerGround Planes With an Efficient 2-D FDTDLumped Element Method. _MM   
39、Multilevel Full-Chip Routing With Testability and Yield Enhancement. %B#hb<7}  
40、On the analysis of four symmetrical interconnects for signal integrity evaluation. gB(9vhj$  
41、On-Chip Digital Jitter Measurement,from Megahertz to Gigahertz. :D"@6PC]  
42、On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. 0s860Kn  
43、Optimum Signal Integrity Through Appropriate Analysis of Signal Return Path and Power Delivery. N4I^.k<-A  
44、Power and Signal Integrity and Electromagnetic Emission; the balancing act of decoupling, planes and tracks. xGKfej9  
45、POWER AND SIGNAL INTEGRITY IIMPROVEMENT IN ULTRA HIGH-SPEED CURRENT MODE LOGIC. uk`T+@K  
46、Power Bus Signal Integrity Improvement and EMI Mitigation on Multilayer High-Speed Digital PCBs with Embedded Capacitance. IXGW2z;  
47、Practical issues in high speed PCB design. JQ*D  
48、Reliable Eye-Diagram Analysis of Data Links via Device Macromodels. =ud`6{R  
49、Signal integrity analysis of high-speed interconnects through a full-wave transmission line model. wqJ*%  
50、Signal Integrity Analysis of Interconnects Using the FDTD Method and a Layer Peeling Technique. 7*zB*"B'1t  
51、Signal Integrity Analysis of High-speed, High-Pin-Count Digital Packages. 2Ryp@c&r^  
52、Signal integrity analysis of the traces in electromagnetic-bandgap structure in high-speed printed circuit boards and packages. ~?FK ; (  
53、Signal Integrity Analysis with Power Delivery Network. wn &$C0  
54、Signal integrity of bent differential transmission lines. {iA^rv|  
55、Signal Integrity Check by Simulation to Improve PCB Performance. 7d3'CQQ4  
56、Signal Integrity Impact of Ultra Low Power IO Initiatives. q{a#HnZo"  
57、Simulation of High-Speed Distributed Interconnects Using Krylov-Space Techniques. mWNR(()v  
58、Simulation of Crosstalk on Printed Circuit Boards by FDTD, FEM, and a Circuit Model. sW;7m[o  
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