[资料]射频MEMS和光电应用晶圆级封装(博士论文PDF下载)

[post]The current trend in electronic packaging research is to integrate more functions into one package, reduce electrical path parasitic, and increase the heat conduction in order to make the final packaged system smaller, more reliable, more functional and more complete, while keeping the packaging cost low. In this trend, unconventional devices (such as MEMS and optoelectronic devices) and various substrate materials (e.g., InP, GaAs, etc.) are integrated into a single package together with conventional silicon-based ICs. The resulting novel packages are produced by both wafer-level batch processes as well as many multichip 2D/3D serial assembly processes. Therefore a complete functional unit can be built in a single package. This feature is particularly valuable in space-constrained environments such as mobile phones, as it increases the packaging efficiency while decreasing complexity of the PCB and overall design. In this thesis, the development of wafer-level fabrication processes and supplemental techniques for applications in hybrid wafer-level packaging for MEMS and optoelectronic devices is presented. Hybrid wafer-level packaging makes it possible to integrate a variety of dies (i.e., silicon IC, MEMS, optoelectronic) into one final package, while using potentially economical wafer-le ..

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